1. Field of the Invention
The present invention relates to a voltage regulator for generating a constant voltage, and more particularly, to a control circuit for controlling operating states of a plurality of differential amplifiers to obtain operating states suitable for low current consumption and high-speed operation.
2. Description of the Related Art
In recent years, with the spread of mobile devices, market demands for compact and light batteries have been increased. In contrast, an operating time of the mobile devices greatly influences product differentiation. Therefore, reduction in power consumption of electronic circuitry is an absolute must.
One of the solutions is to perform fine-grained control of functional circuits of a mobile device based on a device state. For example, a practical attempt has been made at integrated circuit level to allow only a minimum number of functional circuits to operate during standby, to thereby suppress an increase in power consumption.
A voltage regulator is required to adjust, to a constant voltage, a time-varying power supply voltage, for example, a battery voltage, and supply the power supply voltage to the functional circuits. In general, in order to improve a power supply voltage rejection ratio and transient response characteristic of the voltage regulator, it is necessary to increase current consumption of the voltage regulator.
A conventional voltage regulator is illustrated in FIG. 5. FIG. 5 illustrates a circuit having a two-stage structure in which an output transistor is directly driven based on an output of a differential amplifier as described in Japanese Patent Application Laid-open No. Hei 03-158912 (FIG. 2). In the structure, the number of through paths is small and thus the current consumption may be reduced, but there is a problem that it is difficult to significantly improve the power supply voltage rejection ratio and the transient response characteristic.
As a structure for solving the problem of the structure illustrated in FIG. 5, a three-stage structure in which an intermediate stage is provided between the differential stage and the output stage as illustrated in FIG. 6 is widely used. When the three-stage structure is used, the power supply voltage rejection ratio and the transient response characteristic may be significantly improved, but the number of through paths increases. Therefore, the three-stage structure is not suitable to achieve low power consumption.
As one of the methods of balancing the contradictory features described above, it is conceivable to set, to the voltage regulator, an operating state in which the power supply voltage rejection ratio and the transient response characteristic are high and thus current consumption is large and an operating state in which the power supply voltage rejection ratio and the transient response characteristic are low and thus current consumption is small, and manually or automatically switch between the operating states based on an operating state of a functional circuit which is a load.
For example, in Japanese Patent Application Laid-open No. 2002-287833 (FIG. 1), a plurality of voltage regulators having different characteristics are connected in parallel and the start and stop of the plurality of voltage regulators are controlled based on a load state to optimize the current consumption of the voltage regulators based on the load state.
However, the structure described in Japanese Patent Application Laid-open No. 2002-287833 (FIG. 1) requires the output transistors equal in number to circuits to be switched, leading to an increase in chip area. A gate terminal of each of the output transistors has a relatively large parasitic capacitance. Therefore, when the plurality of output transistors are switched, a charge and discharge time becomes long. Thus, there is a problem that a fluctuation in output voltage during switching is large.
There may be also a method of using a common output transistor to switch between a plurality of amplifying units each of which corresponds to the amplifying unit as illustrated in FIG. 5 or 6. However, even in this case, it is necessary to prepare a plurality of differential amplifiers, and hence the chip area increases. Therefore, there is a problem that it is difficult to reduce a cost.